Abstract At the advent of modern technology, Digital communication is one of the most secure and safe information transmission system in both at work place and at home. Pulse Amplitude Modulation is one of the simplest form of pulse modulation techniques employed in digital communication. It is extensively used in telecommunications as an intermediate stage of other techniques such as pulse code modulation which is used in Public Switched Telephone Network (PSTN), time division multiplexing.

Objectives The purposes of the experiment described here are as follows 1.) To implement pulse amplitude modulation & demodulation circuit practically. 2.) To observe the effects of clock frequency on demodulated wave. 3.) To observe the effect of duty cycle of clock on demodulated wave.

Circuit Description Pulse Amplitude Modulation is a technique that describes the conversion of an analog signal to a pulse-type signal where the amplitude of pulse denote the anaformation. This anaformation is represented by sine wave in the experiment which is also called modulating signal. The PAM waveform is generated by applying a modulating signal as well as a clock (sampling) signal to analog switch simultaneously as shown in figure-1,

Figure 1 Pulse amplitude Modulation circuit The reconstruction of PAM waveform is relatively easy as only 2nd order low Butterworth filter is required. The circuit involves the demodulation process is given below,

Figure 2: PAM Demodulation circuit

Figure 2: Pulse amplitude demodulation circuit

Observations The message signal is kept unchanged all through the experiment and shown below,

Ch1: Message Signal 200Hz, 1.4Vpp.

Figure 3: Message signal

The clock signal used as well as associated PAM waveform are shown below

CH1: Clock Signal 1.8 KHz, 4.72Vpp Duty cycle 30%.

CH2: PAM Modulated Signal with Message 200Hz (1.04Vpp). Figure 4: Clock signal and PAM waveform

Effect of Frequency of Clock Signal Here, Clock frequency [or Sampling frequency] = fc Message signal frequency = fm

 When fc = 2fm,

CH1: Signal.

Demodulated

CH2: PAM Signal With Message 1.04Vpp Figure 5: PAM waveform and its demodulation

signal

900Hz,

Clock 1.8 KHz, DT=30%.

From figure 5, we see that sampling with double frequency gives two samples per cycle and input continuous message signal is determined by its samples at the output of Low Butterworth filter, having higher cut-off frequency 1 KHz. The reconstructed signal is noisy but still truly similar to input signal. So, the value of clock frequency is acceptable. Acceptable fc value = 1.8 KHz

(for 900Hz message signal)

Clock frequency higher than 1.8 KHz is desirable but too much higher value will definitely increases the bandwidth required. Therefore we need to compromise and choose a moderate clock frequency.

 When fc < 2fm,

CH1: Signal.

Demodulated

CH2: PAM Signal With Message signal 1.3 KHz, 1.04Vpp Clock 1.8 KHz, DT=30%. Figure 6:PAM waveform and its demodulation

From figure 6, we observe that reconstructed signal is strongly distorted. So the value of clock frequency is unacceptable. Unacceptable value of fc = 1.8 KHz

(for 1.3 KHz message signal)

Finally, we can conclude that for acceptable PAM signal transmission Nyquist sampling rate [i.e. fc > = 2fm] must be maintained.

Effect of Duty Cycle of Clock Signal on Information Recovery The duty cycle of clock pulses plays a vital role in PAM modulation system. The consequences are described below, The narrower pulses are fruitful for Time Division Multiplexing and thus lower duty-cycle is beneficial in this respect. One demerit of narrower pulse is it contains less power as the power content of a pulse depends on its amplitude and width. As

a result noise severely affects the message signal during transmission and demodulation.

CH1: Demodulated Signal.

CH2: PAM Modulated Signal with clock 1.866 KHz (DT=30%), Message signal 200Hz. Figure 7

So that larger duty cycle is desirous for this sake.

CH1: Signal.

Demodulated

CH2: PAM Modulated Signal with clock 1.969KHz (DT=83%), Message signal 200Hz. Figure 8

Effect of Amplitude of Clock Signal Amplitude of Clock signal does not affect the pam modulated signal. Magnitude of message signal needs to be kept lower than clock signal and hence the sampling IC 4066, which is used for switching, produces good pam signal. Unless cut-off pam signal will appear in the output.

Discussion PAM modulation natural sampling is relatively easy circuit to implement but it took 4 weeks for me to complete. A lot of difficulties came such as   

selection of switch for sampling [transistor switching didn’t give satisfactory results] finding the appropriate value of capacitor at the input of analog switch generation of constant frequency with variable duty cycle clock signal

Though the Astable configuration of ne555 IC provides clock signal with variable duty cycle, frequency of clock signal also changes simultaneously. Therefore a 50KΩ variable resistor is added among the pins 6, 7, 8, of ne555 IC. With this configuration, frequency still varied but deviation was small.

Conclusion Finally, The PAM modulation and demodulation with 2nd order Butter worth low filter has been implemented. The consequences of duty cycle as well as frequency variation have also been observed.

References LEON W. COACH II, Digital and Analog Communication Systems, fifth edition, Prentice-Hall International, INC. Websites 1) www.scientech.bz 2) www.circuitlab.com

APPARTUS LIST: NO. 01. 02. 03. 04. 05.

COMPONENTS NAME Power Supply DC 5V IC IC IC Resistors

06.

Capacitors

MODEL NO. CD-4066 UA741 NE555 1k, 27k, 33k, 10k, 50kohms variable. 10nf,100nf,4.7nf

Quantity 2 pcs 1 pc 2 pcs 1 pc 10 pcs 6 pcs